Rectennas, rectifying antennas that convert incident radiation into electricity, have been investigated for a number of years, and optical rectennas for converting solar radiation into electricity have also been proposed1,2,3. These devices are generally comprised of two key elements: an antenna array tuned to absorb incident radiation and an array of rectifying elements that converts the antenna's high frequency radiation into low frequency or DC electricity. Proper impedance matching is required to efficiently extract power from these devices, and at radio frequencies (RF), conversion efficiencies of over 85% have been demonstrated1. Optical rectennas, also called nanoantennas, nantennas, nanoantenna electronic collectors (NECs), or rectenna solar cells (RSCs), are of particular interest due to their theoretically high efficiencies and ability to harvest longer wavelength radiation than conventional PV cells, such as IR and waste heat.
However, rectennas designed to harvest even longwave IR require antenna elements whose dimensions are commensurate with the radiation to be harvested, typically in the micron regime or below. The small wires that comprise the antenna elements may be even smaller, e.g., in the submicron size range. In addition, in order to rectify electron oscillations in the antenna, the rectifying elements must operate at very high (terahertz) frequencies. For example, to convert 10 μm (longwave IR) radiation, rectenna diodes must operate near 30 THz, and at 300 THz for 1 μm (near IR) radiation.
In order for rectenna devices to become commercially viable, they, like conventional PV modules, must be manufacturable on a scale that allows them to cover a large enough surface area to produce useful electrical power, and at a cost that is competitive with other energy conversion devices. However, current manufacturing technology faces a number of barriers to meeting these requirements.
Nanoscale electronic devices today require a state-of-the-art semiconductor fabrication facility (‘fab’). These fabs are built around the use of silicon wafer substrates, typically in the diameter range of 150 mm to 450 mm (6-in to 18-in). The costs of these substrates alone are high enough to make these devices unaffordable, while even the maximum substrate size is far from the square meters require for useful energy harvesting. Additionally, the very high facilities capital expense and relatively low throughput of the required lithography processes prevent wafer-based nanoantenna devices from becoming practical or affordable in the foreseeable future.
Over the last several decades, a relatively new form of patterning has been increasingly applied to lithographic processing, variously called microembossing, imprinting, or more recently, nanoimprint lithography (NIL)4,5,6, it replaces expensive ultra-short wavelength photomask lithography with ‘mechanical’ patterning capable of forming structures below 10 nm. When carried out using roll-to-roll (‘R2R’) processing, this type of patterning shows great promise in enabling significantly reduced device cycle times and costs for manufacturing large area nanoantenna solar cells and related devices.
However, while nanoimprinting may be adequate for creating single level patterns, more complex multi-level electronic devices present a problem. One basic semiconductor fab process—pattern registration using mask alignment—cannot be used for forming the multiple levels of aligned patterns at the resolution required for rectenna device formation on most flexible polymeric substrates due to the characteristic dimensional instabilities of plastic films relative to silicon or glass substrates. This can be seen if attempting to align two films independently formed with the exact pattern, even if on the same type of plastic substrate using the same imprint tool—where one area might exhibit very good alignment, the x, y positional errors at nearby locations can show significant non-linear variations, make alignment over large areas impossible by conventional means.
Several approaches have been developed to get around this dimensional stability issue, including various forms of self-aligned lithography and imprinting7,8,9,10, methods which are particularly useful for roll-to-roll fabrication of flexible electronics. The advantage of self-alignment for polymeric films is that the relative alignment accuracy of the features in the various device layers is established in the master template from which the imprint stamp is ultimately made and is thus effectively independent of the non-uniform dimensional distortions characteristic of virtually all plastic films (U.S. Pat. No. 6,861,365: Method and system for forming a semiconductor device; Taussig; U.S. Pat. No. 7,195,950: Forming a plurality of thin-film devices; Taussig; U.S. Pat. No. 8,263,433: Method of fabricating an active device array and fabricating an organic light emitting diode array Yeh, et al; Sharma: U.S. Pat. No. 7,470,544: Sensor array using SAIL, etc.).
However, these processes suffer from serious limitations: in particular, self-aligned imprint lithography can only produce aligned patterns on material layers (metals, dielectrics) that have been deposited prior to formation of the self-aligned imprint mask. For example, certain circuit requirements, such as wire traces connecting from one layer to another, certain geometries (wire crossings), or material compatibility issues cannot be formed using this approach, while an additional layer of circuit elements cannot be added in registration to a multi-level device structure previously formed using the self-aligned process.
Attempts to get around these constraints are very limited and have serious drawbacks. In self-aligned imprint lithography, forming isolated electrical contacts in a single metal layer requires forming perforations in certain locations of the overlying layers and using chemical etching through these perforations to undercut and eventually separate the underlying metal areas. This approach has the disadvantage of producing an unsupported void space under the dielectric where the metal was removed, which can result in shorting or fracturing of the device if flexed. Also, the undercutting technique is not very controllable and, other than being used to break contact between sections of a conductive layer, cannot be used to produce the well-defined features required in many electronic devices. Finally, “isolating” circuit traces by this technique is limited to open areas where the perforations are accessible for chemical etching.
Thus for R2R processing, the current approaches for fabricating multi-layer electronic devices in general have significant drawbacks. This is particularly problematic for rectenna devices, as they cannot be formed cost-effectively by any current means due to the their submicron alignment requirements and large size (many square feet) requirements. Given the potential utility of such devices in energy and heat harvesting, it is therefore of considerable commercial usefulness to provide an alternative manufacturing method that can overcome these limitations, in particular through the use of roll-to-roll processing for achieving large area, high volume production of low-cost energy harvesting devices. These limitations, as well as others described in the following sections, are overcome by the means of the current disclosure.